VHDL In DesignWorks Professional
The DesignWorks Simulator Option now includes the ability to create device models and independent simulations using VHDL! The new VHDL support features:
- Fully integrated with the existing structural simulator
- Signal values from within the VHDL simulation can be displayed in the timing diagram along with signals from any other part of the design.
- Structural and VHDL models can be mixed in any way, that is, structural designs can incorporate devices with VHDL models and VHDL simulations can refer to structural library components.
- Integrated source code editor with color coding of VHDL keywords.
- Fast compilation.
- Model Wizard command allows you to rapidly generate a VHDL file given a list of the port connections required for a model.
- Note that DesignWorks does not implement 100% of the VHDL language standard in this version. Please see our VHDL Language Implementation page for more information.
