Here's the Complete, Unabridged List of DesignWorks Schematic Capture Features
User Interface
 | Floating Tool Palettes gives instant access to schematic editing functions and
status information. |
 | Modeless operation lets you perform most schematic operations like part placement and
repositioning, wire editing and selection without using a single menu or typed command. |
 | Context-sensitive menus accessed through the right mouse button |
 | Single key shortcuts for commonly-used operations. |
 | Multiple window environment allows you to have any number of designs, pages and
subcircuit levels open simulataneously, with full copy and paste support between them. |
Standard Libraries
Extensive Symbol Libraries with over 13,000 parts in ANSI and IEEE format. The
list includes all 5400, 7400, 7500, 4000, and ECL familites, plus an extensive collection
of processors, memories, interface parts, discretes and others. Libraries include full
package assignment data for assignable parts. Floating parts palette allows quick
selection of devices at any time.
DesignWorks is shipped with an extensive set of over 12,000 device symbols. Digital
components are provided in Compact, ANSI (rectangular) and IEEE formats. Gate devices are
provided in monolith (i.e. one package = one symbol) and with DeMorgan equivalents. All
digital devices have full gate packaging information.
| Family |
Compact |
ANSI |
IEEE |
Comments |
| Connectors |
X |
X |
|
General connector symbols |
| Diodes |
X |
|
|
Various standard diode types |
| Discretes |
X |
|
|
Common generic discrete components |
| National Linear |
X |
X |
|
Linear ICs |
| Transistors |
X |
|
|
Various standard transistor types |
| Spice Lib |
X |
|
|
For SPICE-based simulators |
| Primitives |
X |
|
|
DesignWorks simulation primitives |
| 54 TTL |
|
|
|
Includes 54, 54S, 54LS, 54AS, 54ALS, 54AC, 54ACT, 54F, 54HC, 54HCT, 54HCU |
| 74 TTL |
X |
X |
X |
Includes 74, 74S, 74LS, 74AS, 74ALS, 74AC, 74ACT, 74F, 74HC, 74HCT, 74HCU |
| 75 TTL |
X |
X |
X |
Includes 75ALS CMOS X X X |
| GE/RCA CMOS |
X |
X |
X |
|
| National ECL |
X |
X |
X |
|
| Memory |
X |
X |
X |
Motorola, Texas Instruments (TI) and Toshiba |
| Microprocessors |
X |
X |
X |
Intel, Motorola and Zilog |
| Miscellaneous |
X |
X |
X |
|
| PLD |
X |
X |
X |
|
Library Creation and Editing
 | Integrated Device Symbol Editor allows you to create custom symbols for devices
or hierarchical blocks using standard drawing tools. A powerful Auto-Create function will
generate a standard rectangular symbol from your pin list in seconds. |
 | Create and edit complex parts with the on-line part editor |
 | Quickly modify an existing part and save it as a new part |
Schematic Editing
 | Powerful Schematic Editing Features speed the drawing process. Cut, Copy, Paste
and Duplicate any collection of selected schematic objects within a design or between
designs. Drag any collection of device symbols with full rubber-banding. Automatic page
references on inter-page connectors. Full bussing with automatic pin annotation. Full
Undo/Redo on all editing operations. |
 | Powerful Text Attribute Features allow arbitrary text information to be
associated with any signal, device or device pin. More than 40 fields are predefined for a
variety of applications and more can be added at any time. Once a field name is defined,
its name is chosen from a list of available fields when entering data. This greatly
reduces the chance of entry errors. All attribute data can be displayed, positioned, and
rotated independently of the device or signal and can be edited right on the schematic. |
 | Add an unlimited number of user-named properties |
 | Database supports unlimited number of user-names properties |
 | Undo/redo commands |
 | Wire rubberbanding maintains orthogonal routing |
 | Supports you user-definable off-page references, title blocks and borders |
 | Colors can be set for all objects |
 | Extensive zoom capabilities, define a zoom rectangle, best fit |
 | View parts, nets etc on selected pages in a convenient table |
 | Automatic packaging assigns or re-assigns part references |
 | Incorporate TrueType fonts for all type of text |
 | Quickly create custom title blocks and drawing boarders |
 | Output black and white or color printouts to Windows supported printers |
 | Spread printout across multiple pages |
Packager Module
 | can be run at any time during circuit design. It checks gate-to-package allocation and
then automatically creates optimum device packaging. For all gate types with multiple
gates per package, a pop-up menu allows you to change the section at any time. Pin
numbering is then automatically updated to reflect the change. |
 | Design multiple-part packages, handles packages with dissimilar parts |
 | |
 | Designs are saved in a single file that includes all pages and parts |
Custom Sheet Settings
DesignWorks supports full customization of sheet borders, grids and graphics. The
default border which is created for each new design can be updated from a "sheet
template" file with a single operation. Template files are really just design files
with custom settings for border size, text font, grid spacing, company logo, etc.
Templates for the standard ANSI sizes A - E and other common sizes are included.
 | Custom Sheet Sizes and Borders can be configured to your drawing standards.
DesignWorks comes with templates for the standard ANSI sheet sizes, plus commonly-used
printer and plotter sheets. All aspects of sheet layout, including reference grids, title
blocks and border text styles can be fully customized. |
Attribute Operations
DesignWorks allows text attributes to be associated with any device, signal or pin in a
design, and with the design itself. Attribute Editing - Attributes can be entered
individually on each object through a standard select and Get Info operation, or
collectively using the Browser tool. Any attribute that is displayed on the diagram can be
edited right on the diagram.
Attribute Display Options - Attributes can be displayed on the diagram adjacent to the
associated signal, device or pin. Each field can be moved and rotated individually. A
default display position can be specified for device attributes. Field names can be
optionally displayed with each item. Text style for attribute display is set globally for
all attributes in the design. Attribute Global Operations - Attributes are defined
centrally for a design. Global Duplicate, Merge and Delete operations allow all data
associated with a field to be modified throughout the design. User-defined attribute
fields can be added at any time. Report Generation - All attribute fields can be used in
custom report formats.
Spreadsheet-style Design Browser
 | Browse/search properties with a built-in spreadsheet editor |
 | Spreadsheet editor lets you edit properties on multiple parts simultaneously |
Hierarchical Design
 | Hierarchical Design with unlimited levels is fully supported. Any symbol on a
schematic can contain another schematic of arbitrary size. Blocks can be nested to any
desired depth, limited only by available memory. Any number of hierarchical blocks can be
open for editing at any time. To support a variety of applications, two hierarchical modes
are supported: Pure Mode is designed for use in VLSI design and other applications
requiring large circuit sizes. In this mode, all instances of a circuit block are
identical and editing the internals of one block immediately updates all similar blocks.
Interactive simulation is not available in pure hierarchy mode since separate simulation
data is not available for the various instances. Physical Mode is intended for use with
the DesignWorks simulator or for any designs requiring physical design data (i.e. PCB
package names and pin numbers) which may be different among the various instances of an
internal circuit. |
 | Automatically create ports on a hierarchical block or underlying schematic |
 | Hierarchical structure allows you to attach sub-circuits to a part |
 | Associate a part hierarchically with a multi-page schematic |
 | Control hierarchical part descent on an instance basis |
DesignWorks provides a number of powerful operations for working with device or
hierarchical block symbols and internal circuit definitions. Hierarchy Mode - Three
hierarchy modes are available to accommodate different design requirements.
"Flat" mode provides the simplest possible structure for smaller designs.
"Pure" mode implements a pure hierarchical structure, i.e. each part type is
defined only once and all instances of a type are identical. "Physical" mode
allows full hierarchical operation, but allows separate attribute data to be associated
with each physical instance of a part.
Hierarchy Operations - Hierarchical designs can be created "top-down" or
"bottom-up". Attach and Detach commands allow separately-created designs to be
merged into a single hierarchy, or vice-versa. Internal circuit definitions can be saved
with a part in a library or as a separate circuit file. Part definitions can be saved from
a schematic sheet to a library. Devices in a schematic can be updated from their original
library or from any selected new source.
Netlisting and Report Generation
DesignWorks includes a powerful Custom Report Generator tool for netlist and text
report generation. The report format is driven by a "form file" which contains
formatting commands and constant text. Form file features allow you to control: Overall
report structure, e.g. netlist formats by signal or by device, listings by device for
bills of materials, etc. Design, device, signal and pin attributes to be included.
Selection of devices or signals to include in the report, by name or attribute value.
Selection of attribute fields to be used as sources for power and ground connections.
Sorting and merging of lines within the file. Format of each pin connection entry, each
line and each page. Hierarchy format, including flattened and hierarchical netlists. Error
checking, including checking for missing attribute fields. The package includes 20 or more
form files for standard industry formats. These can be used as-is or used as a guide for
creating your own formats.
 | The Integrated Report Tool can generate standard or customized netlists and
reports showing any attribute fields. These facilities make DesignWorks an ideal front-end
for your other design tools, including simulation, SPICE, PCB layout (OrCAD, PCAD, PADS,
WinBoard, FutureNet and many others), FPGA design, and RF design. |
 | Design Rule Checker performs all of the checks to verify netlist |
 | Bill of Materials generator supports a user-definable format |
-
Searching and Error Checking
The Find tool allows you to interactively locate devices, pins or signals by name or
attribute value. Matching items can be viewed one at a time, or all items can be selected
at once and then accessed with another tool. The ErrorFind tool is similar to Find, but
locates items by possible error conditions, including: Unnamed devices Unmatched port
connector Unnamed signal Undriven signal Multiply driven signal Unconnected signal Fanout
> X Unmatched page connector Unconnected pin Unnumbered pin Unmatched port pin Any
located errors can be flagged as OK so they are not located again.
- Report generator - error reports
Back Annotation
 | Import/export property information from ASCII files |
 | Update Properties utility |
 | Back-annotation |
Two back annotation tools are included with the DesignWorks/Schematic package. The PCB
Back Annotation tool "BackAnno" allows device package assignments to be
automatically updated from a "was-is" text file created by an external system.
Formats supported include Cadnetix (SCICARDS), Douglas, Racal-Redac RINF and XCAD. Pin and
gate swaps, and component renaming are supported in flat or hierarchical designs. A
general attribute back annotation tool called "Updater" is also included. This
tool reads a simple tab-separated text file format and will update arbitrary device,
signal or pin attribute fields throughout a design. This can be used as a general
mechanisn for applying user-supplied part numbers, simulation information or other data
from a text database.
System Compatibility and Environment
 | The DesignWorks Environment allows optional
simulation and other design tools to be installed at any time and instantly become an
integrated part of your design system. A number of powerful tools are provided with the
package, including netlist generation, device symbol editing, design error checking,
design-to-library and library-todesign conversion and others. |
 | Supports long filenames in Windows 95 and NT |
 | Delivers optimal, 32 bit performance under Windows 95, 98
and NT |
What would you like to do?
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